EE348 Introduction to Logic Design

Instructors


 
S1: Cüneyt Bazlamaçcý 

S2: Gözde Bozdaðý Akar

S3: M. Mete Bulut

S4: ÇaðatayTekmen

Textbook

Digital Design

M. Morris Mano

Prentice-Hall

Grading

MT 1: 30%

MT 2: 30%

Final: 40%

Schedule


 
S1: Monday11:40– 12:30 (EA211)

Thursday 13:40– 15:30 (EA312)

S3: Tuesday10:40– 12:30 (EA206)

Thursday 10:40– 11:30 (EA206)

S2: Monday11:40– 12:30 (EA310)

Thursday 13:40– 15:30 (EA310)

S4: Tuesday10:40– 12:30 (EA211)

Thursday 10:40– 11:30 (EA211)

Topics

 
 
W1   – 12-16 Feb  Introduction, numbers systems
W2   – 19-23 Feb  Signed arithmetic, Boolean Algebra
W3   – 26 Feb-2 March  Operator precedence, standard forms
W4   – 5-9 March
W5   – 12-16 March Simplification of Boolean functions, Karnaugh Map
W6   – 19-23 March Karnaugh Map, 2-level implementations
W7   – 26-30 March Design of combinational circuits
W8   – 2-6 April MSI circuits 
W9   – 9-13 April  MSI circuits (Decoders, MUX, etc)
W10 – 16-20 April  Basic FFs, analysis of synchronous sequential ccts
W11 – 23-27 April  Design of synchronous sequential ccts
W12 – 30 April-4 May Design of synchronous sequential ccts
W13 – 7-11 May Registers, serial mode of operation
W14 – 14-18 May Counters
W15 – 21-25 May Timing seq., memory unit